Virtual Clocks
By definition a virtual clock is a clock which does not have a port. Which is not a real clock but it mimics the functionality of a real clock. It is advantageous to use these for optimization by giving different values of jitter and uncertainity along with
Use of virtual clocks gives us the following advantages while modelling the
Below is how your IO delays can be modeled based with the help of virtual clocks.
1. step 1 create the virtual clocks
2. model the input delays and output delays with respect to the virtual clocks.
3. apply the clock latencies by the virtual clocks.
create_clock -name CLK1 -period 3.236 -waveform { 0 1.618 } [get_ports {O_CLK1}]
set_clock_transition 0.150 [get_clocks {CLK1}]
set_clock_uncertainty -setup 0.110 [get_clocks {CLK1}]
set_clock_latency 2.200 [get_clocks {CLK1}]
create_clock -name VIRT_CLK1 -period 3.236 -waveform { 0 1.618 }
set_clock_transition 0.150 [get_clocks {VIRT_CLK1}]
set_clock_uncertainty -setup 0.110 [get_clocks {VIRT_CLK1}]
set_clock_latency 2.200 [get_clocks {VIRT_CLK1}]
set_input_delay 1.6 -clock [get_clocks {VIRT_CLK1}] [get_ports {O_CLK}]
By definition a virtual clock is a clock which does not have a port. Which is not a real clock but it mimics the functionality of a real clock. It is advantageous to use these for optimization by giving different values of jitter and uncertainity along with
Use of virtual clocks gives us the following advantages while modelling the
- Specify the clock latencies with respect to virtual clocks with different values compared to real clocks in your design.
- Gives flexibility to check IO timing separately as by default different path groups are created for different clocks..
- Perform the budgeting by adjusting the IO delays and the clock latencies on them and perform your optimization accordingly.
- It also gives you the flexibility to give uncertanity and jitter values differently for your optimization and timing calculation purposes
Below is how your IO delays can be modeled based with the help of virtual clocks.
1. step 1 create the virtual clocks
2. model the input delays and output delays with respect to the virtual clocks.
3. apply the clock latencies by the virtual clocks.
create_clock -name CLK1 -period 3.236 -waveform { 0 1.618 } [get_ports {O_CLK1}]
set_clock_transition 0.150 [get_clocks {CLK1}]
set_clock_uncertainty -setup 0.110 [get_clocks {CLK1}]
set_clock_latency 2.200 [get_clocks {CLK1}]
create_clock -name VIRT_CLK1 -period 3.236 -waveform { 0 1.618 }
set_clock_transition 0.150 [get_clocks {VIRT_CLK1}]
set_clock_uncertainty -setup 0.110 [get_clocks {VIRT_CLK1}]
set_clock_latency 2.200 [get_clocks {VIRT_CLK1}]
set_input_delay 1.6 -clock [get_clocks {VIRT_CLK1}] [get_ports {O_CLK}]